⚙

Intel x86

Memory Segmentation

History

The Intel 8086, 8088, and 80186 had a 20-bit address bus. Therefore, they had a 20-bit address space that limited the addressable memory to 1 MB. They used 16-bit register that limited address offsets to 64 KB.

💡
640 kilobytes were reserved for the operating system and the applications. The remaining 384 kilobytes were reserved for the BIOS.

The Intel 8086 introduced real mode which use memory segmentation as a way to allow programs to address more than 64 KB of memory.

The Intel 80286 introduced protected mode with support for virtual memory and memory protection.

💡
The processor needed to be reset to switch between real mode and protected mode.

The Intel 80386 improved the protected mode and added a paging unit. It had a 32-bit address space and 32-bit registers that increased addressable memory to 4 GB.

💡
The processor could switch between real mode and protected mode without resetting.

Processors that supports protected mode always start in real mode, in order to maintain backward compatibility with earlier processors.

Overview

The CPU uses 16-bit segment registers to determine the actual memory address.

In real mode, the segment registers CS, DS, SS, and ES point to:

The Intel 80386 added two segment registers: FS and GS.

Real mode

In real address mode, the processor uses a 20-bit segmented memory address space, that allows 1 MB of addressable memory.

The 16-bit segments is shifted 4 bits left and added to a 16-bit address offset to compute a 20-bit physical address.

The Intel 80286 had 24-bit address bus and computed 24-bit physical addresses.

Many segment:offset pairs produce the same physical address.

The segment address is a linear address, which is the same as physical address.

Protected mode

286

The protected mode uses 24-bit addressing and extends the address space to 16 MB.

The 16-bit segment registers contain an index into a table of segment descriptors containing 24-bit base addresses to which the offset is added.

386

The protected mode uses 32-bit addressing and extends the address space to 4 GB.

The 32-bit segment registers can access the full address space without using address offsets.

Long mode

In the x86-64 architecture, long mode provides access to 64-bit instructions and registers.

To reduce the complexity and cost of address translation, 64-bit processors use a 48-bit address space that limits the addressable memory to 256 TB.

32-bit and 16-bit protected mode programs are executed in a sub-mode called compatibility mode (or legacy mode).

Real mode programs cannot be executed.

Assemblers

Borland TASM

Borland Turbo Assembler (TASM) was released on 1989.

💡
First assembler to allow 32-bit segments.

Microsoft MA

Microsoft Macro Assembler (MASM) was released on 1981.

💡
Only produces code for DOS and Windows.

Registers

16-bit Address Registers

Instruction Pointer (IP)

IP is the instruction pointer (or program counter).

It contains the address of the next instruction to be executed.

It is incremented after fetching an instruction.

Stack Pointer (SP)

SP is the stack pointer.

It is used to access the stack segment.

It contains the top address of the stack.

Base Pointer (BP)

BP is the base pointer.

It is used to access the stack segment.

It contains the base address of the stack.

Source Index (SI)

SI is the source index.

It is used to access the data segment.

Destination Index (DI)

DI is the destination index.

It is used to access the data segment.

Accumulator Register(AX)

AX is the accumulator register.

It is used in arithmetic, logic, and data transfer operations.

Base Register(BX)

BX is the base Register.

It contains the address of the base storage location from where the data were stored continuously.

Count Register(CX)

CX is the count register.

It is used as a loop counter.

Data Register(DX)

DX is the data register.

It is used in I/O operations; and in division and multiplication operations.

Status

The flags register is a set of 16 bits that are updated depending on the result of an operation.

16-bit Segment Registers

Code Segment(CS)

CS is the code segment register.

It contains the address of the code segment.

The code segment contains the instructions that are to be executed.

Data Segment(DS)

DS is the data segment register.

It contains the address of the data segment.

The data segment contains static variables.

Stack Segment(SS)

SS is the stack segment register.

It contains the address of the stack segment.

The stack segment contains the address of subroutines and procedures from the callstack.

Extra Segment(ES, FS, GS)

ES, FS, and GS are extra segments used to access the code segment and data segment.

32-bit Registers

64-bit Registers

64-bit registers are only available in 64-bit mode.

Operations

AX, BX, CX, DX can be accessed as 16-bit registers, or as 8-bit registers (low and high).