| ALU | Arithmetic Logic Unit | Hardware | |
| ARM | Advanced RISC Machine | Hardware | |
| AVX | Advanced Vector Extensions | Hardware | |
| CISC | Complex Instruction Set Computer | Hardware | |
| CPU | Central Processing Unit | Hardware | |
| D-cache | Data Cache | Hardware | |
| DDR | Double Data Rate | Hardware | |
| DMA | Direct Memory Access | Hardware | A technique that allows hardware components to transfer system memory without any intervention from the CPU. |
| DRAM | Dynamic Random-Access Memory | Hardware | |
| FLOPS | FLoating point Operations Per Second | Hardware | |
| FPU | Floating-point Processing Unit | Hardware | |
| GPU | Graphics Processing Unit | Hardware | |
| I-cache | Instruction Cache | Hardware | |
| I/O | Input/Output | Hardware | |
| IPC | Instructions Per Cycle | Hardware | |
| IPS | Instructions Per Second | Hardware | |
| ISA | Instruction Set Architecture | Hardware | |
| MIPS | Millions of Instructions Per Second | Hardware | |
| MIPS/W | Millions of Instructions Per Second per Watt | Hardware | |
| NUMA | Non-Uniform Memory Access | Hardware | A memory architecture used in parallel computers.
Memory access time depends on the memory location relative to the processor. |
| RAM | Random-Access Memory | Hardware | |
| RISC | Reduced Instruction Set Computer | Hardware | |
| ROM | Read Only Memory | Hardware | |
| SDRAM | Synchronous Dynamic Random-Access Memory | Hardware | |
| SIMD | Single Instruction Multiple Data | Hardware | |
| SPU | Synergistic Processing Unit | Hardware | 128-bit RISC processor specialized for SIMD operations.
7 of these coprocessors are part of the Cell architecture of the PS3. |
| SRAM | Static Random-Access Memory | Hardware | |
| SSE | Streaming SIMD Extensions | Hardware | |
| UMA | Uniform Memory Access | Hardware | A shared memory architecture used in parallel computers.
All the processors share the physical memory uniformly.
A common model is to share the system memory and video memory. |
| VGA | Video Graphics Array | Hardware | |
| VRAM | Video RAM | Hardware | Variant of dynamic RAM in graphics adapters. |
| VU | Vector Unit | Hardware | 128-bit RISC processors specialized for SIMD operations.
2 of these are part of the Emotion Engine architecture of the PS2. |
| ASM | Assembly | Software | |
| BCL | Base Class Library | Software | Core library of .NET |
| CIL | Common Intermediate Language | Software | CPU-independent set of instructions that can be efficiently converted to the native code.
Formerly called Microsoft Intermediate Language (MSIL). |
| CLI | Common Language Infrastructure | Software | |
| CLR | Common Language Runtime | Software | .NET runtime |
| DB | DataBase | Software | |
| DLL | Dynamic-Link Library | Software | Shared library in Microsoft Windows. |
| DSP | Digital Signal Processor | Software | |
| FIFO | First In, First Out | Software | |
| GC | Garbage Collector | Software | |
| GPGPU | General-Purpose computing on Graphics Processing Units | Software | Using a GPU to perform general-purpose computing. |
| GUID | Globally Unique Identifiers | Software | |
| JIT | Just-In-Time | Software | |
| JSON | JavaScript Object Notation | Software | |
| LIFO | Last In, First Out | Software | |
| LRU | Least Recently Used | Software | |
| MRU | Most Recently Used | Software | |
| NaN | Not A Number | Software | |
| NPN | Node Package Manager | Software | Command-line program to manage node.js libraries. |
| RAII | Resource Acquisition Is Initialization | Software | |
| RLE | Run-Length Encoding | Software | Lossless data compression which runs on sequences in which the same value occurs many consecutive times.
The sequence is encoded to store only a single value and its count. |
| RTTI | Run-Time Type Information | Software | |
| SQL | Structured Query Language | Software | |
| UML | Unified Modeling Language | Software | |
| UUID | Universally Unique Identifiers | Software | |
| XML | eXtensible Markup Language | Software | |
| FSM | Finite State Machine | AI | |
| GOAP | Goal-Oriented Action Planner | AI | A system for AI agents that allows them to plan a sequence of actions to satisfy a particular goal. |
| CDLOD | Continuous Distance-Dependent Level Of Detail | Graphics | A technique for rendering heightmap terrains on the GPU. |
| FBX | FilmBoX | Graphics | A proprietary file format owned by Autodesk for 3D assets. |
| glTF | GL Transmission Format | Graphics | A file format for 3D scenes and models using JSON. |
| HUD | Head-Up Display | Graphics | A display area that presents data as part of a game's user interface. |
| LOD | Level Of Detail | Graphics | A technique for simplifying a mesh by removing vertices and detail. |
| OOO | Out Of Order | Hardware | Modern CPUs support out of order execution.
It allows the processor to execute instructions in a different order than their original order in a program.
The processor can avoid being idle while waiting for the preceding instruction to complete. |